A vertical cavity surface emitting laser (VCSEL: simply referred to as a surface emitting laser element hereinafter) is a semiconductor laser element for emitting light in an orthogonal direction relative to a substrate. It is possible to arrange a plurality of semiconductor laser elements in a two-dimensional array pattern on a same substrate. The surface emitting laser element has been applied as a light source for communication and a device for a variety of other applications. Regarding such the surface emitting laser element, as a communication speed increases to 2.5 Gbps and 10 Gbps or faster, it is required to provide a surface emitting laser element and a surface emitting laser element array that are superior in high frequency response, or a laser module that a surface emitting laser element and a surface emitting laser element array are built therein.
In the surface emitting laser element, one pair of semiconductor multilayer reflecting mirrors (for example, Al(Ga)As/Ga(Al)As or the like as a GaAs base) is formed on a semiconductor substrate formed of a material such as a GaAs, an InP, or the like, and an active layer as a light emission region is disposed between the pair of the reflecting mirrors. In particular, it is possible to form a GaAs based surface emitting laser element on a GaAs substrate, and it is possible to use an AlGaAs based DBR mirror having a preferable thermal conductivity and a high reflectivity. Accordingly, the GaAs based surface emitting laser element is promising as a laser element capable of emitting laser light with a wavelength band of between 0.8 μm and 1.0 μm. Moreover, a surface emitting laser element in which a GaInNAs based material is used for an active layer is promising as a surface emitting laser element capable of emitting light in a long wavelength region between 1.2 μm and 1.6 μm. Among the surface emitting laser elements, there is developed a surface emitting laser element of an oxide confined type, in which an Al oxide layer confines an electric current injection region for enhancing a current efficiency and reducing a threshold current value.
A configuration of a conventional surface emitting laser element of the oxide confined type with a wavelength band of 850 nm will be described in detail below with reference to FIG. 7. A surface emitting laser element 30 is formed of a laminated structure of a lower part DBR mirror 34, a lower part cladding layer 36, a quantum well active layer 38, an upper part cladding layer 40, and an upper part DBR mirror 42 disposed on an n-GaAs substrate 32. The lower part DBR mirror 34 is formed of thirty-five pairs of n-Al0.9Ga0.1As/n-Al0.2Ga0.8As each having a layer thickness of λ/4n (λ is an emission wavelength, and n is a refractive index). The upper part DBR mirror 42 is formed of twenty-five pairs of p-Al0.9Ga0.1As/p-Al0.2Ga0.8As each having a layer thickness of λ/4n (λ is an emission wavelength, and n is a refractive index).
In the upper part DBR mirror 42, one layer near the quantum well active layer 38 is formed of an AlAs layer 44 in place of the Al0.9Ga0.1As layer. Further, Al in the AlAs layer 44 at a region except a current injection region is selectively oxidized to form a current blocking layer formed of an Al oxide layer 45.
In the laminated structure, the upper part DBR mirror 42 is processed to be a mesa post having a round shape with a diameter of 30 μm up to the nearest layer thereof to the quantum well active layer 38 below the AlAs layer 44 through a photolithography treatment and an etching process. In forming the mesa post, all of semiconductors except a region of the mesa post are removed through etching. Alternatively, a ditch groove with an annular shape is formed through etching, and the mesa post is formed inside the ditch groove with the annular shape. The laminated structure formed in the mesa post is processed in an oxidation process in water vapor at a temperature of approximately 400° C., so that Al in the AlAs layer 44 is selectively oxidized from outside the mesa post to form the current blocking layer formed of the Al oxide layer 45.
A polyimide layer 46, for example, is embedded in a surrounding region of the mesa post. An electrode having a ring shape is provided as a p-side electrode 48 to contact with an outer circumference of a top surface of the mesa post in a width of approximately between 5 μm and 10 μm. After a backside surface of the substrate 32 is properly polished to have a substrate thickness of, for example, 200 μm, an n-side electrode 50 is formed on the backside surface of the substrate 32. An electrode pad 52 is formed on the polyimide 46 to contact with the p-side electrode 48 for connecting to an external terminal with a wire. In the surface emitting laser element 30 having the configuration described above, an electric current flows between the n-side electrode 50 on the backside surface of the substrate 32 and the p-side electrode 48 on the upper region of the mesa post. Accordingly, an electrically conductive semiconductor substrate with an impurity of n-type or p-type doped therein is used (refer to Patent Reference 1).
As shown in FIG. 8, as a surface emitting laser element having an electrode arrangement capable of responding at a high speed, in a surface emitting laser element 60 having a mesa post, an n-type electrode 71 is provided on an upper region of the mesa post. A p-type electrode 72 is provided on a lower part cladding layer 67 at a same surface side as a semi-insulating semiconductor substrate 61. In the surface emitting laser element 60, a lower part DBR mirror formed of a p-type semiconductor multilayered layer 62 having a relatively high resistivity does not become a current path. Accordingly, it is possible to reduce a resistance of the element. In the figure, 63 designates a lower part cladding layer, 64 designates an active layer, 65 designates an upper part cladding layer, 66 designates a lower part cladding layer, 68 designates a current blocking layer, 69 designates an upper part cladding layer, and 70 designates a semiconductor multilayered layer (refer to Patent Reference 2).
The surface emitting laser element array is formed of a plurality of the surface emitting laser elements arranged on a same semiconductor substrate.    Patent Reference 1: Japanese Patent Application Publication No. 2003-037336    Patent Reference 2: Japanese Patent Application Publication No. H06-291414